phc2sys: don't over-control a destination clock
If ptp4l is running as a boundary clock, and multiple master ports share a hardware clock that is different than the slave port's hardware clock, then phc2sys in autocfg mode will synchronize that clock multiple times per sync loop, once per-port. Example output when this happens: CLOCK_REALTIME phc offset -9 s2 freq -355 delay 3635 eth9 phc offset 9 s2 freq +1762 delay 7488 eth8 phc offset 41 s2 freq +1985 delay 7424 eth7 phc offset 15 s2 freq +1952 delay 7440 eth6 phc offset 20 s2 freq +1059 delay 7440 eth1 phc offset 22 s2 freq +1783 delay 7424 eth12.400 phc offset 15 s2 freq -4207943 delay 7551 eth12.300 phc offset 388 s2 freq +2336645 delay 7536 eth12.200 phc offset 451 s2 freq +2516553 delay 7438 eth12.100 phc offset 268 s2 freq +64274 delay 7405 This is easily reproducible by adding VLANs to a single network interface and configuring ptp4l to use those VLAN interfaces as PTP ports. This patch prevents this problem by introducing a new deduplicated destination clock list to phc2sys. Each time phc2sys reconfigures, the destination clock list is re-populated. In the synchronization loop, phc2sys will only use the clocks in this list. Example output of reconfiguration with this patch: reconfiguring after port state change selecting eth9 for synchronization selecting eth8 for synchronization selecting eth7 for synchronization selecting eth6 for synchronization selecting eth1 for synchronization selecting eth13.400 for synchronization skipping eth13.300: eth13.400 has the same clock and is already selected skipping eth13.200: eth13.400 has the same clock and is already selected skipping eth13.100: eth13.400 has the same clock and is already selected selecting eth12.400 for synchronization skipping eth12.300: eth12.400 has the same clock and is already selected skipping eth12.200: eth12.400 has the same clock and is already selected skipping eth12.100: eth12.400 has the same clock and is already selected skipping eth13.500: eth13.400 has the same clock and is already selected This patch was tested with autocfg mode and also when specifying source and destination manually via commandline. Signed-off-by: Cliff Spradlin <cspradlin@google.com>master
parent
dc0f6427bd
commit
4c5d180ab3
36
phc2sys.c
36
phc2sys.c
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@ -71,6 +71,7 @@
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struct clock {
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LIST_ENTRY(clock) list;
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LIST_ENTRY(clock) dst_list;
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clockid_t clkid;
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int phc_index;
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int sysoff_supported;
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@ -117,6 +118,7 @@ struct node {
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struct ClockIdentity clock_identity;
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LIST_HEAD(port_head, port) ports;
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LIST_HEAD(clock_head, clock) clocks;
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LIST_HEAD(dst_clock_head, clock) dst_clocks;
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struct clock *master;
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};
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@ -400,14 +402,28 @@ static void clock_reinit(struct node *node, struct clock *clock, int new_state)
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}
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}
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static struct clock *find_dst_clock(struct node *node, int phc_index) {
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struct clock *c = NULL;
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LIST_FOREACH(c, &node->dst_clocks, dst_list) {
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if (c->phc_index == phc_index) {
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break;
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}
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}
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return c;
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}
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static void reconfigure(struct node *node)
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{
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struct clock *c, *rt = NULL, *src = NULL, *last = NULL;
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struct clock *c, *rt = NULL, *src = NULL, *last = NULL, *dup = NULL;
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int src_cnt = 0, dst_cnt = 0;
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pr_info("reconfiguring after port state change");
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node->state_changed = 0;
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while (node->dst_clocks.lh_first != NULL) {
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LIST_REMOVE(node->dst_clocks.lh_first, dst_list);
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}
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LIST_FOREACH(c, &node->clocks, list) {
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if (c->clkid == CLOCK_REALTIME) {
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rt = c;
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@ -427,8 +443,18 @@ static void reconfigure(struct node *node)
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case PS_PRE_MASTER:
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case PS_MASTER:
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case PS_PASSIVE:
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pr_info("selecting %s for synchronization", c->device);
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dst_cnt++;
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dup = find_dst_clock(node, c->phc_index);
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if (!dup) {
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pr_info("selecting %s for synchronization",
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c->device);
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dst_cnt++;
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LIST_INSERT_HEAD(&node->dst_clocks,
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c, dst_list);
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} else {
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pr_info("skipping %s: %s has the same clock "
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"and is already selected",
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c->device, dup->device);
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}
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break;
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case PS_UNCALIBRATED:
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src_cnt++;
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@ -482,6 +508,7 @@ static void reconfigure(struct node *node)
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rt->state = PS_MASTER;
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clock_reinit(node, rt, rt->state);
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}
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LIST_INSERT_HEAD(&node->dst_clocks, rt, dst_list);
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pr_info("selecting %s for synchronization", rt->device);
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}
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node->master = src;
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@ -745,7 +772,7 @@ static int do_loop(struct node *node, int subscriptions)
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if (!node->master)
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continue;
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LIST_FOREACH(clock, &node->clocks, list) {
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LIST_FOREACH(clock, &node->dst_clocks, dst_list) {
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if (!update_needed(clock))
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continue;
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@ -1598,6 +1625,7 @@ int main(int argc, char *argv[])
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goto bad_usage;
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}
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dst->state = PS_MASTER;
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LIST_INSERT_HEAD(&node.dst_clocks, dst, dst_list);
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if (pps_fd >= 0 && dst->clkid != CLOCK_REALTIME) {
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fprintf(stderr,
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